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►10G/40G
Ethernet / PCI Express Reference Design |
HTG-K816: Xilinx Kintex UltraScale™ Half Size
PCI Express Development Platform
Datacenter Customizable Platform
Populated with Xilinx Kintex UltraScale™ 040 or 060 FPGA , the HTG-K816 network card provides access to
eight lanes of PCI Express Gen 3 ( 8 x 8Gbps), two
independent banks of DDR4 (72-bit) memory components (5GB), and front
panel Z-Ray interface for hosting high-speed mezzanine cards. The
Z-RAY port is populated with up to 16 GTH (16x16.3G) serial
transceivers along with power (12V/5A, 3.3V/16A, & VCCIO/1A),
differential clocks, and control signals (single-ended and I2C I/Os).
The Z-Ray interface allows quick customization of the platform to host
different communication and processing ports for different applications. HiTech Global offers Z-RAY mezzanine modules with Hybrid Memory Cube (HMC), QSFP+, SFP+, FireFly ,
CXP, etc. HiTech Global also offers design services for any custom
Z-RAY module requiring access to the GTH serial transceivers of the
onboard Kintex UltraScale FPGA.
The HTG-K816 is also available for high
volume production.
 |
Base Board |
Hybrid Memory Cube
(HMC) |
Back Side |
X2 QSFP+
(2x40G) |
X3 SFP+
(3x10G) |
X1 CXP
(12X10G) |
X1 FireFly
(12X10G) |
Extensible FPGA Framework
Reference Design
The Extensible FPGA Framework (EFW)
empowers FPGA developers with a verified set of productivity solutions,
including module targeted physical interface components, device drivers
and APIs for the HTG-K816 platform. Frameworks save months of
development and debug time by enabling developers to skip the tedious
and time consuming phase of IP core integration, interface verification
and firmware development.
More info
Extensible FPGA Framework (EFW) with a verified set of
productivity solutions [
More info]
|
Framework Bundled Content |
Framework Type |
Required ZRAY Module |
| |
Base |
1G |
10G |
40G |
|
|
Linux Device Drivers and
APIs (Source) |
● |
● |
● |
● |
- |
|
x4/x8 PCIe Gen3 PCIe hard IP
based PCIe application interface and arbiter (Verilog) |
● |
● |
● |
● |
- |
|
AXI4-Lite Master and Arbiter
with 32-bit control plane for registers accesses (Verilog) |
● |
● |
● |
● |
- |
|
32-bit AXI4-Lite Slave for
integrating user blocks (Verilog) |
● |
● |
● |
● |
- |
|
Micron Embedded Flash controller for
in-system field upgrades (FuP) (Netlist) |
● |
● |
● |
● |
- |
|
I2C Controllers (Netlist) |
● |
● |
● |
● |
- |
|
Targeted DDR4 controllers with
AXI4 wrapper (Verilog) |
● |
● |
● |
● |
- |
|
128-Bit 8-Channel PCIe
RapidDMA with x4 Gen3 PCIe Endpoint (Netlist) |
|
● |
● |
|
- |
|
256-Bit 8-Channel PCIe
RapidDMA with x8 Gen3 PCIe Endpoint (Netlist) |
|
|
|
● |
- |
|
GiG EMAC with 1000Base-X
Interface (Netlist) |
|
● |
● |
● |
ZR-X3SFP+ |
|
Low and Ultra-Low Latency 10G
Ethernet, 32-bit data path (Netlist) Latency optimized for
financial market applications |
|
|
● |
|
ZR-X3SFP+ |
|
40G Ethernet, 128-bitdata path
(Netlist) Area optimized for low resource utilization |
|
|
|
● |
ZR-X2QSFP+ |
|
Price |
$3,995 |
contact us |
contact us |
contact us |
|
Supported FPGAs in A1156 package:
|
|
Device Name |
KU040 |
KU060 |
| |
Effective LEs (K) |
509 |
696 |
|
Logic Resources |
Logic Cells (K) |
424 |
580 |
|
CLB Flip-Flops |
484,800 |
663,360 |
|
CLB LUTs |
242,400 |
331,680 |
|
Maximum Distributed RAM (Kb) |
7,050 |
9,180 |
|
Memory Resources |
Block RAM/FIFO w/ECC |
600 |
1,080 |
|
Block RAM/FIFO (18Kb each) |
1,200 |
2,160 |
|
Total Block RAM (Mb) |
21.1 |
38 |
|
Clock Resources |
CMT (1 MMCM, 2 PLLs) |
10 |
12 |
|
I/O DLL |
40 |
48 |
|
I/O Resources |
Maximum Single-Ended HP I/Os |
416 |
416 |
|
Maximum Differential HP I/O Pairs |
192 |
240 |
|
Maximum Single-Ended HR I/Os |
104 |
104 |
|
Maximum Differential HR I/O Pairs |
48 |
48 |
|
Integrated IP |
DSP Slices |
1,920 |
2,760 |
|
System Monitor |
1 |
1 |
|
PCIe® Gen1/2/3 |
3 |
3 |
|
Interlaken |
0 |
0 |
|
100G Ethernet |
0 |
0 |
|
16.3Gb/s Transceivers (GTH) |
20 |
28 |
|
Features:
►
x1 Xilinx Kintex UltraScale040 or 060 FPGA
►x8
PCI Express Gen 3 end-point
►x10
DDR4 memory components (72-bit) - 5GB
►x1 Z-RAY
port providing access to
up to 16 GTH serial transceivers, control pins, and power for
hosting mezzanine cards (x3 SFP+, x2QSFP+, x1 CXP, x1 12-port
FireFly, or HMC)
- 060 model : 16 GTH transceivers
- 040 model : 12 GTH transceivers
- 035 model : 8 GTH transceivers
►
x2 Samtec QSE/QTH connectors each with
16 LVDS signals for board-to-board connections (cable connect or
stackable)
►
x1 Samtec QTH connector with four GTH serial transceivers
(only with the 060 model)
►
BPI Flash Memory component for
configuration
►
JTAG port for configuration and debugging
►
x1 USB/UART port
►1PPS
GPS Synchronization (Schmitt-Trigger, Comparator, ADC)
►
IP protection circuit
►
6.6" x 2.5"
►Supports
both PCI Express and Standalone operations
-
12V/6A Power adapter for standalone operation
|
Ordering information:
Part Numbers:
HTG-KUS-PCIE-HH-060-2 (populated with -2 FPGA speed grade)
[Buy
Online]
* Available with half or full-height brackets
Kit Content:
-HTG-K816 platform
-User manual, schematic in pdf, PCI Express and DDR4 memory reference
designs
|
|
Accessories (Z-RAY Modules) |
2GB Hybrid Memory Cube (HMC) Module
Part Number: HTG-ZR-HMC |
3-port SFP+ Module
Part Number: HTG-ZR-X3SFP+ [Buy
Online] |
2-port QSFP+ Module
Part Number: HTG-ZR-X2QSFP+
[Buy
Online] |
x12 Tx/Rx FireFly Module
Part Number: HTG-ZR-FF [Buy
Online] |
CXP (12x10G) Module
Part Number: HTG-ZR-CXP [Buy
Online] |
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