Virtex 5™  PCI Based LEON Development Board

                                 


 

 

The PCI-XC5V board has mainly been developed  to support the early development and fast prototyping LEON systems. The incorporation of onboard
volatile and non-volatile memories, together with serial and Ethernet interfaces makes this board ideal for implementing LEON designs.

The LEON processor is a synthesizable VHDL model of a 32-bit processor compliant to the SPARC V8 architecture. It is provided in a version full source code under the GNU GPL license, and under commercial IP licenses with additional IP cores and features.

This board, incorporating a Xilinx Virtex 5 field programmable gate array, is capable of operating stand-alone, as PCI plug-in card, or can be configured as a PCI host in passive PCI backplane applications. Additionally, the design of this board can support the implementation of LEON-FT fault-tolerant systems if the implemented core incorporates these features.

The board supports  SO-DIMM, SRAM, FLASH, GBit Ethernet, USB 2.0, DSU UART, user and memory expansion connectors. The Mezzanine interfaces and their mechanical layout have been maintained so that the existing mezzanine and accessory boards for CPCI boards can be used with this board.

 

Features:

Virtex5, XC5VLX50 FPGA (option: LX85, LX110) PCI plug-in format (33MHz, 32 bit)
On-board memory:
- SDRAM SODIMM (64 bit wide up to 512MB)
- SRAM 80 Mbit (2M x 40 bit)
- FLASH 128 Mbit (4M x 32 bit)
Debug Support Unit interface (USB/RS232)
Memory expansion connector
User I/O Connectors
Ethernet PHY GBIT transceiver (DP83865)
USB 2.0 ULPI Host/Periph. Interface (ISP1504)
On-board oscillators
FPGA configuration and programming via JTAG
Specially designed and configurable for LEON core implementations
Capable of supporting LEON-FT core implementations
PIO expansion RS232 / RS422 / LVDS / CAN / TMTC options

 

Kit Content:

User's manual, complete schematics, necessary .ucf files for Xilinx place&route tools, BCC/RCC cross-compiler system, Evaluation Version of GRMON, GRLIB/leon3 VHDL model. A pre-synthesised leon netlist is programmed in the FPGA configuration prom, using a standard LEON configuration with DSU, PCI and Ethernet. Custom configurations can be shipped on request.

Ordering Information:

Part Number:  V5-PCI
Price"

 

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