Altera Stratix V PCI Express Networking Card
|
|
|
Altera Stratix V PCI Express Networking Card |
|
|
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
l
The HTG-S510 series are powered by Altera Stratix V GXAx FPGA devices with different densities and resources in KF40-F1517 package. Designed for high performance networking applications (i.e configurable/customizable 40Gbps NIC, 40Gbps network analyzer, etc.), these platforms provide access to two QSFP+ (40Gbps each) IEEE802.3ba compliant Ethernet ports, two SFP+ (10Gbps each) ports, 8-lane PCI Express Gen 3 (64Gbps), one high-speed mezzanine connector, two DDR3 SO-DIMMs (up to 8GB), and three independent QDRII memory components (144Mb each). Functionality of the HTG-S510 platforms are extended by one Vita57 compliant FMC (FPGA Mezzanine Connector) port providing access to 80 LVDS I/Os and 8 additional Serial Transceivers. HiTech Global offers wide range of FMC modules supporting these platforms for debugging, serial/parallel port expansion, AD/DA, and even FPGA density enhancement. In addition, number of these platforms can be connected together in series through the FMC ports in either PCI Express or Stand-Alone mode. Supported by 10G / 40G Ethernet, PCI Express Gen3, DDR3, and QDR-II reference designs along with PCI Express Linux/Windows drivers, the HTG-S510 minimizes engineering efforts for complex design integration and verification.
Supported Stratix V Devices:
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
|
The Extensible Framework (EFW) provides a verified set of productivity solutions, including module targeted physical interface components, device drivers and APIs for the HTG-S510 platform. The EFW eliminates the tedious and time consuming phase of module bring-up by providing module targeted and hardware verified physical interfaces for the HTG-S510. Additionally, the framework allows the user to simulate, integrate and test Ethernet and DMA cores (licensed separately) with the cost-free time limited synthesizable binaries and simulation libraries. Following figure shows the elements and interfaces of the S5-PCIe framework.
The base framework provides all the design files, device drivers and API to accesses the memory mapped registers inside the Stratix V FPGA. It enables instantiation and control of custom logic blocks through the GUI application.
The EFW implements the capability to
program and erase the P30 parallel flash memory on the
HTG-S510 platforms
through the PCIe interface at very high speeds. Integrating the remote
upgrade unit allows any user design to be field upgradeable through PCI
Express.
The Frame work includes module targeted and
hardware verified RTL blocks for: -x8 Gen2 and x8 Gen3 PCIe hard IP block with PCIe application interface and arbiter -Avalon-MM master/arbiter for distributed control and configuration of various EFW blocks -Two 1600 Mbps DDR3 controllers -Three 320 MHz QDRII+ controllers -Remote flash upgrade unit with standard host interface for in-system field upgrade of the FPGA image through the PCIe interface -I2C controllers -Reconfiguration block for run-time control and configuration of the GX transceivers -Time limited (15min) synthesizable binaries and full simulation libraries for hardware verified Ethernet solutions up to 40Gbps: o 40Gbps Ethernet using the direct QSFP+ interface o 10Gbps Low Latency Ethernet using the SFP+ interface -Time limited (15min) synthesizable binaries and full simulation libraries for hardware verified Multi-channel (4) scatter-gather block DMA controller -All modules with Altera’s Avalon-ST streaming interface for data path and Avalon-MM interface for control, configuration and memory interface -Top level RTL interface wrapper for custom user design block for easy implementation of user logic -Linux device drivers and API for PCIe interface -A single unified GUI for entire EFW with scripting support
|
||||||
|
► Hardware Key Features: |
►Ordering information Part Numbers: -HTG-S5-PCIE-A5 -HTG-S5-PCIE-A7 -HTG-S5-PCIE-A9 -HTG-S5-PCIE-AB -HTG-S5-PCIE-D5 Availability: Q2CY2012 , orderable now ►Kit Content: - HTG-S510 Board - Hardware Setup Guide - CD ROM with User Manual, Schematics (in searchable pdf format) , frame work demo files, PCI Express Gen 3 design , DDR3 and QDRII memory controllers |
|||||
| Accessories & Tools | ||||||
 FMC daughter card with one QSFP+ and two SFP+ connectors with default clocks for CPRI/OBSAI (other clocks can also be supported) Part Number: HTG-FMC-SFP-OC Price:$895 |
|
 FMC daughter card with x8 PCI Express Root interface Part Number: HTG-FMC-PCIE-RC Price: $695 |
 FMC daughter card with 8 SMA ports and pin headers providing access to 33 LVDS/66 Single-ended IOs Part Number: HTG-FMC-SMA-LVDS Price: $725 |
 FMC to FMC Cable Part #: FMC-TO-FMC-9 (9" length) FMC-TO-FMC-5 (5" length) |
Quad SFP+ Part Number: HTG-FMC-X4SFP |
|
|
HiTech Global, LLC |
||||||
