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Main Features:
PCI Express Features
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Compliant to PCI Express Base Specification Revision 1.0a
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Compliant to PCI Express to PCI Bridge Specification Revision 1.0
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Support Single One-Lane PCI Express Connection
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Support 32-bit CRC Covering All Transmitted Data Packets
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Support 16-bit CRC On All Link Message Information
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Support PCI Express Advanced Error Reporting Capability
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Support Error Forwarding Including Data Poisoning and PCI Bus Parity
Errors.
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Support 100MHz PCI Express Differential Reference Clock.
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Secondary Side Initialization via Type 0 Configuration Cycles
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Support Variable Payload Size (up to 512 bytes)
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Support Variable Size of Read Request (up to 512 bytes)
PCI Interface Features
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Compliant to PCI Local Bus Specification Revision 3.0
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Support PCI 32-bit, 33/66 MHz, 3.3V, NOT 5V tolerant
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Support Five External REQ/GNT Pairs For Internal Arbiter
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Support PCI LOCK Operation
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Support up to Two PCI Delayed Transaction (memory read, I/O read/write,
and configuration read/write)
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Support Clock Run Operation
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Support Five 33MHz/66MHz PCI Clock Outputs
Power Management
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Support D0, D1, D2, D3hot and D3cold device power states defined in PCI
Power Management Specification Rev 1.1
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Support PME event propagation on behalf of PCI devices
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Side-band WAKE# signals
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PCI Express Active Power Management states (ASPM) : L0s and L1
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Support link power management: L0, L0s, L1, L2
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In-band beacon generation
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Integrated AUX Power Plane
SMBus Interface
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Compliant to System Management Bus Specification, Revision 2.0
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Support Slave-mode operation only
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Support configuration of PCI Express PHY via SMBus
Price:
(Please include the quantity)
Part Number:
GL9701
[ Buy GL9701 Samples Online]
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