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16-bit ADC/DAC FMC Modules

       

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The HTG-ADC16 and HTG-DAC16  modules plug into FMC HPC or HSPC slots in Vita 57.1 or 57.4 compliant FPGA carrier boards and provide access to four 16-bit ADC and two or four DAC channels. The  4-channel DAC (requiring 16 serial transceivers) only works with Vita57.4 compliant FPGA carrier cards such as HTG-9100, HTG-830, or HTG-828

The modules use Texas Instruments ADS54J60 ADC and  DAC39J84  DAC devices with JESD204B support.

The ADS54J60 is a low-power, wide-bandwidth, 16-bit, 1.0-GSPS, dual-channel, analog-to-digital converter (ADC). Designed for high signal-to-noise ratio (SNR), the device delivers a noise floor of –159 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 10.0 Gbps, supporting two or four lanes per ADC. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy. Each ADC channel optionally can be connected to a wideband digital down-converter (DDC) block. The ADS54J60 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption.

The JESD204B interface reduces the number of interface lines, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the ADC sampling clock to derive the bit clock that is used to serialize the 16-bit data from each channel.

Features

  • 16-Bit Resolution, Dual-Chanel, 1-GSPS ADC
  • Noise Floor: –159 dBFS/Hz
  • Spectral Performance (fIN = 170 MHz at –1 dBFS):
    • SNR: 70 dBFS
    • NSD: –157 dBFS/Hz
    • SFDR: 86 dBc
    • SFDR: 96 dBc (Except HD2, HD3, and Interleaving Tones)
  • Spectral Performance (fIN = 350 MHz at –1 dBFS):
    • SNR: 67.5 dBFS
    • NSD: –154.5 dBFS/Hz
    • SFDR: 75 dBc
    • SFDR: 85 dBc (Except HD2, HD3, and Interleaving Tones)
  • Channel Isolation: 100 dBc at fIN = 170 MHz
  • Input Full-Scale: 1.9 VPP
  • Input Bandwidth (3 dB): 700 MHz
  • On-Chip Dither
  • Integrated Wideband DDC Block
  • JESD204B Interface with Subclass 1 Support:
    • 2 Lanes per ADC at 10.0 Gbps
    • 4 Lanes per ADC at 5.0 Gbps
    • Support for Multi-Chip Synchronization
  • Power Dissipation: 1.35 W/ch at 1 GSPS
The DAC39J84 is a low power, 16-bit, quad-channel, 2.8 GSPS digital to analog converter (DAC) with JESD204B interface.Digital data is input to the device through 1, 2, 4 or 8 configurable serial JESD204B lanes running up to 12.5 Gbps with on-chip termination and programmable equalization. The interface allows JESD204B Subclass 1 SYSREF based deterministic latency and full synchronization of multiple devices.

The device includes features that simplify the design of complex transmit architectures. Fully bypassable 2x to 16x digital interpolation filters with over 90 dB of stop-band attenuation simplify the data interface and reconstruction filters. An on-chip 48-bit Numerically Controlled Oscillator (NCO) and independent complex mixers allow flexible and accurate carrier placement.

A high-performance low jitter PLL simplifies clocking of the device without significant impact on the dynamic range. The digital Quadrature Modulator Correction (QMC) and Group Delay Correction (QDC) enable complete IQ compensation for gain, offset, phase, and group delay between channels in direct up-conversion applications. A programmable Power Amplifier (PA) protection mechanism is available to provide PA protection in cases when the abnormal power behavior of the input data is detected.

Features

  • Resolution: 16-Bit
  • Maximum Sample Rate: 2.8GSPS
  • Maximum Input Data Rate: 1.25GSPS
  • JESD204B Interface
    • 8 JESD204B Serial Input Lanes
    • 12.5 Gbps Maximum Bit Rate per Lane
    • Subclass 1 Multi-DAC Synchronization
  • On-Chip Very Low Jitter PLL
  • Selectable 1x –16x Interpolation
  • Independent Complex Mixers with 48-bit NCO/ or ±n×Fs/8
  • Wideband Digital Quadrature Modulator Correction
  • Sinx/x Correction Filters
  • Fractional Sample Group Delay Correction
  • Multi-Band Mode: Digital Summation of Independent Complex Signals
  • 3/4-Wire Serial Control Bus (SPI)
  • Integrated Temperature Sensor
  • JTAG Boundary Scan
  • Pin-Compatible with Quad-Channel DAC37J84/ DAC38J84 Family
  • Power Dissipation: 1.8W at 2.8GSPS

 

Ordering information

Part Number:  HTG-FMC-ADS54-4 (4-channel ADC compatible with Vita57.1 and Vita57.4 carrier boards)
Part Number:  HTG-FMC-DAC39-IQ2 (2-channel DAC compatible with Vita57.1 and Vita57.4 carrier boards)
Part Number:  HTG-FMC-DAC39-IQ4 (4-channel DAC compatible only with Vita57.4 carrier boards)

Price: [Contact us]

ECCN #: EAR99
SCHEDULE B #:
8471601050