2-Port QSFP28 (2x100G) / QSFP+
(2x40G or 2x56G) FMC
Vita 57 provides a mechanical
standard for I/O mezzanine modules. This standard introduces a
methodology that shall allow the front panel IO of IEEE 1101 form factor
cards to be configured via mezzanine boards. Vita 57 modules have fixed
locations for serial/parallel IOs, clocks, Jtag signals, VCC, and GND.
HiTech Global's Vita 57 modules can be plugged into any Vita 57
compliant carrier boards.
Vita57.1 compliant FMC module is
supported by two QSFP28 (100G) or two QSFP+ (40G/56G) ports and
one Ultra-low jitter (90 fs rms)
programmable clock generator (Si5340)
providing flexible clocks (LVDS, LVPECL, LVCMOS, CML, and HCSL)
for serial transceivers of the host FPGA.
bus of the clock generator can be controlled either by host FPGAs or the on board PIC
Each QSFP28 /QSFP+ port is directly connected to four
multi-gigabit serial transceivers of Vita 57 compliant
FPGA carrier boards.
►x2 QSFP28 (2x100G) /
QSFP+ (2x40G/56G) Connectors
►x1 Texas Instrument
LMK61E2 programmable oscillator
clock buffer providing dedicated clocks for serial transceivers
PIC processor for I2C programming
differential clock SMA port
SCHEDULE B #: