SDI Audio De-embedder IP Core

Overview:

The CWda41 implements an ancillary data packet de-embedder for SDI. It is able to extract the contents of one audio group (4 channels). This implementation is restricted to 20 audio bits per sample, hence the extended data structure described in the ANSI/SMPTE 272M standard (data extension to support 24 audio bits per sample) is not implemented in the present version.

The CWda41 uses two clocks. All input signals are sampled in the rising edge of the video clock signal. This clock is extracted from the incoming SDI bitstream. The other clock, audio clock, is used to output the audio samples. The audio clock frequency must be 256xFs (sample frequency). The video and audio clocks must be derived from the same source.

 When present, AES auxiliary information is extracted from the ancillary packets. This information includes the Validity, Channel Status, and User bits. The block_start signal is asserted high every 192 audio frames.

Functional description:

Ancillary Data Error Detector: performs an analysis on the ancillary packet contents to determine its validity.

Sample Extractor: extracts the audio samples from the ancillary packets according to the ANSI/SMPTE 272M standard and performs parity
checking.

Output FIFO: receives the audio samples extracted from the SDI stream and outputs them in the CW-Link format. It’s used to generate a
continuous and uniform data flow at the output.

Sample Valid Generator: starts the generation of a sample valid instants when the FIFO contains 32 audio samples. This threshold is
chosen in order to guarantee a minimum number of samples in the FIFO. When the cw_req is asserted, an audio sample is removed from the
FIFO and the next sample is produced at the output.

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