Network Interface IP Core

Network Interface IP Core

Overview:

The Multi-purpose Autonomous Network Interface Core (FaceWorks™) is a network interface IP core implementing Ethernet communications in hardware without need for a software protocol stack. FaceWorks implements a basic Ethernet/IP/UDP protocol stack, topped by a proprietary layer, the CWDatagram Protocol (CWDP). FaceWorks also provides the functionalities of a regular Ethernet MAC IP core, if one needs more complete though slower implementations of the protocol layers above Ethernet. Thus, FaceWorks can be operated in
two modes: the core access mode and the MAC mode.

The core access mode provides simple, fast, reliable/unreliable access to on-chip cores. The communication is supported by an Ethernet connection, followed by a partial implementation of the Internet Protocol (IP) , followed by the User Datagram Protocol (UDP) , and finally
followed by the CWDP layer. All layers are implemented in hardware without need for embedded software. In core access mode, FaceWorks can be used for multiple connectivity needs, from those that arise in applications like multimedia streaming, system reconfiguration, programming, control and monitoring to others that arise during system prototyping and debug.

In MAC mode FaceWorks provides a standard Ethernet MAC interface supporting either AMBA™ or OPB bus interface on the processor side. This MAC module also provides a MAC address filter for incoming packets. The filter may be configured to let one or two MAC
addresses be received or, if disabled, it implements promiscuous mode letting any MAC address be received.

Functional Description:

Ethernet RX: Link layer module implementing the Medium Access Control (MAC) sub-layer for received frames. It removes the preamble, verifies data integrity by Cyclic Redundancy Check (CRC) and performs MAC address filtering. It also interfaces with the Ethernet PHY via an MII interface.

Ethernet TX: Link layer module implementing the Medium Access Control (MAC) sub-layer for frames being transmitted. This module adds the frame preamble and the trailing CRC checksum. When FaceWorks is in core access mode this module also adds the MAC headers.

ARP: Network layer module implementing the Address Resolution Protocol . Internally this module maintains a small ARP table (Ethernet addresses indexed by IP addresses). This module is used only when FaceWorks is in core access mode.

IP RX: Network layer module implementing the Internet Protocol for received packets. This module filters the Internet Protocol (IP) packet payload, accepting only UDP packets. Any other type of payload is ignored. This module is used only when FaceWorks is in core access mode.

IP TX: Network layer module implementing the Internet Protocol for transmitted packets. This module sets the Internet Protocol (IP) headers in the RAM TX buffer before issuing a request for the transmission of an IP packet to the Ethernet TX module. This module is used only when FaceWorks is in core access mode.

UDP RX: Transport layer module implementing the User Datagram Protocol (UDP) for received packets. This module filters any messages that are not being sent to the UDP port being used for CWDP communication. Before forwarding the UDP payload (CWDP packet) to
the CWDP RX module, it also removes the UDP headers. This module is used only when FaceWorks is in core access mode.

UDP TX: Transport layer module implementing the User Datagram Protocol (UDP) for transmitted packets. This module sets the UDP headers in the RAM TX buffer before issuing a request for the transmission of an UDP packet to the IP TX module. This module is used only
when FaceWorks is in core access mode.

CWDP RX: Application layer module implementing the CW Datagram Protocol (CWDP) for received packets. It requests the transmission of acknowledge packets, and signals received acknowledge packets when in reliable mode. In addition, it routes CWDP data packets to on-chip cores via the output CW-Link interfaces. This module is used only when FaceWorks is in core access mode.

CWDP TX: Application layer module implementing the CW Datagram Protocol (CWDP) for outgoing packets. This module transmits CWDP packets, and checks if a received acknowledge packet corresponds to the packet sent previously. In addition, it collects data from
the input CW-Link interfaces and forms the CWDP data packet to be transmitted. This module is used only when FaceWorks is in core access mode.

RAM RX: Buffer where incoming packets are stored before their data is forwarded to the on-chip cores or the MAC interface module.

RAM TX: Buffer where outgoing packets are stored before their data is forwarded to the Ethernet PHY.

MAC Interface: Conventional link layer module that provides access to incoming and outgoing Ethernet frames using a slave bus interface (AMBA™ or OPB) which may be clocked in a different clock domain. This module is used only when FaceWorks is in MAC mode.

Key Features:

• Alternative networked chip connectivity solution
• Hardware implementation of Ethernet/IP/UPD/CWDP protocols
• Proprietary CWDP protocol layer allowing connection of up to 8 user cores
• Simple parallel interface (CW-Link) to user cores
• AMBA or OPB interface for the MAC interface and example software driver
• Reliable/Unreliable data communication
• Single destination and single source data networks in reliable communication mode
• Any data network topology in unreliable communication mode
• Local or remote control and configuration software
• Effective transfer rates of up to 8/80 Mbps over 10/100 Mbps networks
• 2.5/25 MHz minimum system clock frequency for 10/100 Mbps networks

Applications:
• Multimedia streaming or any high speed data transfers between systems without involving embedded processors.
• Run time system monitoring and debugging.
• System remote control, (re)configuration and programming.

Deliverables:

Hardware
• VHDL/Verilog source code or synthesizable netlist
• HDL testbench
• Detailed datasheet and user documentation for system integration
• Synthesis script

Software
• Core Access Networks® Remote Access Library Java package
• Sending and receiving data to/from the SoC
• Connection control: setting FaceWorks operation modes, changing network parameters such as IP and MAC address, UDP port, etc
• Core Access Networks® Local Access Library, written in the C language
• Software reference manual

Part Number: CWNET-01

Price:

How To Purchase

FPGA Implementation Results:

Family	Example Device	Slices	GCLK	BRAM	Min. Clock Frequency	Max. Clock Frequency	Design Tools
Spartan-3™	XC3S5000-4	2414	4	4	25 MHz	77 MHz	ISE 9.2i
Virtex-II Pro™	XC2VP100-5	2416	4	4	25 MHz	105 MHz	ISE 9.2i
Virtex-II™	XC2V250-4	2407	4	4	25 MHz	90 MHz	ISE 9.2i
Virtex-4™	XC4VLX15-10	2482	4	4	25 MHz	136 MHz	ISE 9.2i
Virtex-5™	XC5VLX30-1	1393	4	4	25 MHz	150 MHz	ISE 9.2i

ASIC Implementation Result:

Technology	Gate count	Area w/o RAM	RAM	Min. Clock Frequency	Max. Clock Frequency
UMC 130 nm	30 k	0.12 mm2	3 Kbytes	25 MHz	>250 MHz

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