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ISE™  Foundation includes Xilinx SmartCompile technology; an industry-unique combination of capabilities to solve designers' number one design challenge - timing closure. ISE Foundation also includes PlanAhead™ Lite, a subset of the award winning PlanAhead Design and Analysis Tools to provide I/O pin planning capabilities, design analysis, floorplanning, as well as convenient implementation control.

Key Features
PlanAhead Lite including PinAhead technology for easy FPGA pin assignment and powerful
    floorplanning capabilities
New SmartExplorer (Linux only) allowing multiple implementation runs in parallel on multiple
    machines to better leverage computing resources for more turns-per-day
Goal-based Implementation allowing users to easily control implementation options based on
    design goals such as power reduction, area optimization, runtime reduction, or timing performance
Xilinx SmartCompile™ technology providing a powerful design closure environment
An integrated timing closure environment to help identify bottlenecks in your Virtex-5 FPGA
    designs quickly and easily
With a speed-grade or more in cost savings delivering the lowest total cost in logic design
Powered by Xilinx Fmax technology to deliver the industry's fastest logic performance

System Requirements
- Microsoft Windows XP Professional (32 and 64 bit)
- Microsoft Windows Vista Business (32 and 64 bit)
- Red Hat Enterprise Linux WS 4 (32 and 64 bit)
- Red Hat Enterprise Linux Desktop 5 (32 and 64 bit)
- SUSE Linux Enterprise 10* (32 and 64 bit)

Part #: EF-ISE-FND
Price: 
$2,495 (USD)
How To Buy:

Online Store

Standard PO

 

 

 

 

 

Within  ISE design environment, ISE Simulator provides:

Mixed VHDL and Verilog simulation
Integrated wave editor for test bench creation
Behavioral/RTL simulation prior to synthesis
Timing simulation after place and route or fitting
Design hierarchy, waveform, and console views
Source-level debugging capabilities
Command-line console features TCL interface
"Generate Expected Results" process generates expected design output behavior based on input stimulus
The ability to generate Value Change Dump (VCD) or XAD files for use in power estimation (XPower)

Key Features
Simulation support for all of Xilinx leading devices
VHDL-93 language support
Verilog-2001 language support
An intuitive user interface including:
   - Waveform Editor window (used for graphical test bench creation)
   - Waveform Display window
   - Hierarchy Browser window
   - Signals window
   - Advanced Search capability to find signals in any scope of design
   - Filter capability to view only what is pertinent to your needs
   - Tcl-based Simulation Console window
Signal grouping
Support for incremental compilation
Complete printing support
Source code debugging for accelerating design troubleshooting and timing simulations
System Requirements
- Microsoft Windows XP Professional (32-bit only)
- Microsoft Windows Vista Business (32-bit only)
- Red Hat Enterprise Linux 4 WS (32-bit and 64-bit)
- Red Hat Enterprise Linux 5 Desktop (32-bit and 64-bit)
- SUSE Linux Enterprise 10 (32-bit and 64-bit)

Software Requirements
ISE Foundation Software

Part #: EF-ISE-FND-SIM
Price: 
$3,490 (USD)
How To Buy:

Online Store

Standard PO

ChipScope™ Pro tool inserts logic analyzer, bus analyzer, and virtual I/O low-profile software cores directly into your design, allowing you to view any internal signal or node, including embedded hard or soft processors. Signals are captured at the speed of system operation and brought out through the JTAG TAP interface, freeing up pins for your design. Captured signals can then be analyzed through the included ChipScope Pro Logic Analyzer tool.

The ChipScope Pro tool also interfaces with Agilent bench test equipment through the ATC2 software core. This core synchronizes the ChipScope Pro tool to Agilent's FPGA Dynamic Probe scope option. This provides deeper trace memory, faster clock speeds, more trigger options, all using fewer pins on the FPGA.

Key Features
Analyze any internal FPGA signal, including embedded processor busses
Inserts low-profile, configurable software cores either during design capture, or after synthesis
All ChipScope Pro cores are available through the Xilinx CORE Generator™ tool
Enhancements to the System Monitor console make it easier to access on-chip temperature, voltage, and external sensor
Change probe points without re-synthesizing
Debug over an internet connection using remote debug, from your office to the lab, or across the globe

System Requirements
-  Microsoft Windows XP Professional (32 and 64-bit)
-  Microsoft Windows Vista Business (32 and 64-bit)
-  Red Hat Enterprise Linux WS 4 (32 and 64-bit)
-  Red Hat Enterprise Linux Desktop 5 (32 and 64-bit)

Software Requirements
- ISE Foundation™ 

Part #: DO-CSP-PRO
Price: 
$695 (USD)

How To Buy:

Online Store

Standard PO

 

 

 

The Embedded Development Kit (EDK) bundle is an integrated software solution for designing embedded processing systems. This pre-configured kit includes the award winning Platform Studio tool suite as well as all the documentation and IP that you require for designing Xilinx Platform FPGAs with embedded PowerPC® hard processor cores and/or MicroBlaze™ soft processor cores.

Key Features
Platform Studio Integrated Development Environment (IDE)
Platform Studio Software Development Kit (SDK)
Embedded Systems Compiler and Debugger Tools
Board Support Package (BSP) generation
Processor IP library
MicroBlaze soft processor core license

System Requirements
- Microsoft Windows XP Professional (32-bit)
- Microsoft Windows Vista Business (32-bit)
- Red Hat Enterprise Linux WS 4 (32- and 64-bit)
- Red Hat Enterprise Linux Desktop 5 (32- and 64-bit)
- SUSE Linux Enterprise 10* (32- and 64- bit)

Software Requirements
- ISE Foundation™ software

Part #:EF-EDK
Price:  
$495 (USD)

How To Buy:

Online Store

Standard PO

 

 

 

 

 

Xilinx System Generator™ For DSP is a high-level tool for designing high-performance DSP systems using FPGAs.
- Develop highly parallel systems with the industry’s most advanced FPGAs
- Provide system modeling and automatic code generation from Simulink® and MATLAB® (The  
   MathWorks, Inc.)
- Integrates the RTL, embedded, IP, MATLAB and hardware components of a DSP system
- A key component of the Xilinx XtremeDSP™ Tools Package and the XtremeDSP Development and
  Starter Kits
- Developers with little FPGA design experience can quickly create production quality FPGA 
  implementations of DSP algorithms in a fraction of traditional RTL development times.

Key Features
DSP modeling. Build and debug high-performance DSP systems in Simulink using the Xilinx Blockset that contains functions for signal processing (e.g., FIR filters, FFTs), error correction (e.g., Viterbi decoder, Reed-Solomon encoder/decoder), arithmetic, memories (e.g., FIFO, RAM, ROM), and digital logic. The Xilinx Blockset also provides blocks for importing MATLAB functions (e.g., to create control circuits) and HDL modules (System Generator provides HDL co-simulation interfaces to ModelSim from Mentor Graphics and the Xilinx ISE Simulator).
Automatic code generation of VHDL or Verilog from Simulink. Implement behavioral (RTL) generation and target specific Xilinx IP cores from the Xilinx Blockset. There is also a limited (but useful) ability to generate RTL for functions written in MATLAB. Deliver “black box” HDL modules as part of a larger design.
Hardware co-simulation. Create an “FPGA-in-the-loop” simulation target: a code generation option that allows you to validate working hardware and accelerate simulations in Simulink and MATLAB. System Generator supports Ethernet (10/100/Gigabit), PCI™, Cardbus, and JTAG communication between a hardware platform and Simulink.
Hardware / software co-design of embedded systems. Build and debug DSP co-processors for the Xilinx MicroBlaze™ 32-bit RISC processor. System Generator provides a shared memory abstraction of the HW/SW interface, automatically generating the DSP co-processor, the bus interface logic, software drivers, and software documentation for using the co-processor.

System Requirements
Microsoft Windows XP Professional (32-bit)
 

Part #:EF-SYSGEN-4SL-PC
Price:
 $995 (USD)

How To Buy:

Online Store

Standard PO

The Platform Cable USB II provides integrated firmware to deliver high-performance, reliable and user-friendly configuration of Xilinx FPGAs and programming of Xilinx PROM and CPLD devices. The Platform Cable USB II cable optimizes direct programming of third-party SPI flash memory devices and indirect programming of SPI or parallel NOR flash memory devices via the FPGA JTAG port. In addition, Platform Cable USB II is a cost effective tool for debugging embedded software and firmware when used with Xilinx applications such as the Embedded Development Kit and ChipScope™ Pro Analyzer

Part #:HW-USB
Price:   $225 (USD)
How To Buy:

Online Store

Standard PO

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