The ML523
(populated with XC5VLX110T-1FF1136) allows designers to investigate and
experiment with the features of the Virtex-5 Rocket I/O Gigabit Transceivers. The ML523 is an official and ideal platform
for full and detailed characterization of the high speed IO channels
of Virtex-5 LXT devices and meets the highest signal integrity
standards.
Each RocketIO Transceiver is connected to 4 SMA
connectors (TxN, TxP, RxN, and RxP).
Virtex-5 LXT Product Table:
|
Virtex-5 Features |
LX30T |
LX50T |
LX85T |
LX110T |
LX330T |
|
CLB X Array Size (Row x Column) |
80 x 30 |
120 x 30 |
120 x 54 |
160 x 54 |
240 x 108 |
|
Slices |
4,800 |
7,200 |
12,960 |
17,280 |
51,840 |
|
Logic Cells |
30,720 |
46,080 |
82,944 |
110,592 |
331,776 |
|
CLB Flip-Flops |
19,200 |
28,800 |
51,840 |
69,120 |
207,360 |
|
Maximum Distributed RAM KBits |
320 |
480 |
840 |
1,120 |
3,420 |
|
Block RAM/FIFO w/ECC (36kbits each) |
36 |
60 |
108 |
148 |
324 |
|
Total Block RAM (kbits) |
1,296 |
2,160 |
3,888 |
5,328 |
11,664 |
|
Clock Management Tiles (CMT) |
2 |
6 |
6 |
6 |
6 |
|
Digital Clock Manager (DCM) |
4 |
12 |
12 |
12 |
12 |
|
Phase Locked Loop/PMCD |
2 |
6 |
6 |
6 |
6 |
|
DSP48E Slices |
32 |
48 |
48 |
64 |
192 |
|
RocketIO GTP Channels |
8 |
12 |
12 |
16 |
24 |
|
Maximum SelectIO Pins |
360 |
480 |
480 |
680 |
960 |
|
SelectIO Banks |
13 |
17 |
17 |
23 |
35 |
|
Digitally Controlled Impedance (DCI) |
YES |
YES |
YES |
YES |
YES |
|
Maximum Differential I/O Pairs |
180 |
240 |
240 |
340 |
480 |
|
PCI Express End-Points Blocks |
1 |
1 |
1 |
1 |
1 |
|
10/100/1000 Ethernet MACs |
4 |
4 |
4 |
4 |
4 |
|
Configuration (Mbits) |
9.4 |
14.1 |
23.4 |
31.1 |
82.7 |
|
Package |
Size |
IO |
MGT |
|
|
FF665 |
27 |
360 |
8 |
360 (8) |
360 (8) |
|
|
|
|
FF1136 |
35 |
640 |
16 |
|
480 (12) |
480 (12) |
640 (16) |
|
|
FF1738 |
42.5 |
960 |
24 |
|
|
|
680 (16) |
960 (24) |
|










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