PCI 32/64-bit Master/Target  IP Core

Features:

- Implements all the features of the PCI Target only IP core
- Can initiate zero wait-state burst transfers up to 528MB/s at 66Mhz/64-bit
- Up to 4 independent DMA channels (configurable from both the PCI-side and the local-side application)
- Can burst up to 32MB per single DMA request
- 64-bit data transactions dynamically negotiated
- Full support for Memory Write & Invalidate command
- Scatter-gather support
- Free NIOS-to-PCI Bridge Core and Reference Design provided
 

Deliverables:

• Complete set of tools, including :
  • Customization assistant (PCI Wizard)
  • Testbench or test environment in VHDL/Verilog
  • Constraint files generator
  • PCI design examples to help developers (can be used “as is” or customized)
  • Free PCI-to-NIOS Bridge Core and reference design
  • Various test software (including exerciser)
  • Optional prototyping board
  • Technical support from PLDA's experienced team

Price:

                                                                     [Evaluation Board]
 

  
Tel : + 1 408 781-8043  
Fax: + 1 408 268-4173
info@hitechglobal.com
2059 Camden Ave. Suite # 160
San Jose, CA 95124
U.S.A

www.HiTechGlobal.com