Dual14-bit ADC (3 GSPS)/ Dual 16-bit DAC (12.6 GSPS) FMC Module (Vita57.1)

Product Updates

Dual14-bit ADC (3 GSPS)/ Dual 16-bit DAC (12.6 GSPS) FMC Module (Vita57.1)

This Vita57.1/ JESD204B compliant FMC module is powered by Analog Devices' AD9208 (dual 14-bit ADC @ 3 GSPS), AD9172( dual 16-bit DAC @ 12.6 GSPS), and HMC7044 attenuator. The main interface with a host FPGA is supported through 8 serial transceivers.

AD9689 is footprint compatible with AD9208 and can be offered as an option when ordering the product.

ADC (AD9208) Parameters

JESD204B (Subclass 1) coded serial digital outputs
- Support for lane rates up to 16 Gbps per lane
1.65 W total power per channel at 3 GSPS (default settings)
Performance at −2 dBFS amplitude, 2.6 GHz input
- SFDR = 70 dBFS
- SNR = 57.2 dBFS
Performance at −9 dBFS amplitude, 2.6 GHz input
- SFDR = 78 dBFS
- SNR = 59.5 dBFS
Integrated input buffer
Noise density = −152 dBFS/Hz
0.975 V, 1.9 V, and 2.5 V dc supply operation
9 GHz analog input full power bandwidth (−3 dB)
Amplitude detect bits for efficient AGC implementation
2 integrated, wideband digital processors per channel
- 48-bit NCO
- 4 cascaded half-band filters
Phase coherent NCO switching
Up to 4 channels available
Serial port control
- Integer clock with divide by 2 and divide by 4 options
- Flexible JESD204B lane configurations
On-chip dither

Applications:

Diversity multiband, multimode digital receivers
3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A
Electronic test and measurement systems
Phased array radar and electronic warfare
DOCSIS 3.0 CMTS upstream receive paths
HFC digital reverse path receivers

DAC (AD9172) Parameters

Supports multiband wireless applications
- 3 bypassable, complex data input channels per RF DAC
- 1.54 GSPS maximum complex input data rate per input channel
- 1 independent NCO per input channel
Proprietary, low spurious and distortion design
- 2-tone intermodulation distortion (IMD) = −83 dBc at 1.8 GHz, −7 dBFS/tone RF output
- Spurious free dynamic range (SFDR) <−80 dBc at 1.8 GHz, −7 dBFS RF output
Flexible 8-lane, 15.4 Gbps JESD204B interface
- Supports single-band and multiband use cases
- Supports 12-bit high density mode for increased data throughput
Multiple chip synchronization
- Supports JESD204B Subclass 1
Selectable interpolation filter for a complete set of input data rates
- 1×, 2×, 3×, 4×, 6×, and 8× configurable data channel interpolation
- 1×, 2×, 4×, 6×, 8×, and 12× configurable final interpolation
Final 48-bit NCO that operates at the DAC rate to support frequency synthesis up to 6 GHz
Transmit enable function allows extra power saving and downstream circuitry protection
High performance, low noise PLL clock multiplier
- Supports 12.6 GSPS DAC update rate
- Observation ADC clock driver with selectable divide ratios
Low power
- 2.55 W at 12 GSPS, dual channel mode

Applications:

Wireless communications infrastructure
- Multiband base station radios
- Microwave/E-band backhaul systems
Instrumentation, automatic test equipment (ATE)
Radars and jammers

Features

► Vita57.1 FMC HPC Connector
► x1 ADI AD9208 Dual 14-bit ADC (footprint compatible with AD9689)
► x1 ADI AD9172 Dual 16-bit DAC
► x6 SSMC RF Connectors

Ordering information

- Part Number: HTG-FMC-14ADC-16DAC
- Price: Please contact us

12" SSMC To SMA Cable
24" SSMC To SMA Cable

ECCN #: EAR99
SCHEDULE B #: 8471601050

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